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Prototype Electronic Calculator



Jordi Vidal Potau has sent details and photographs of this incredible prototype electronic calculator that he made during 1965-1966, purely as a personal project and challenge during his final years in High School, before taking a degree in "Industrial Engineering: Electronics" at ETSIIB (Escola Tècnica Superior d'Enginyers Industrials de Barcelona), in Bercelona, Spain.

The specification includes:


Jordi Vidal provides the following information about his remarkable achievement in those early days of electronic calculators:

The calculator development was from July 1965 to May 1966. The money to buy the components came from a small salary from a 3 month's "trainee" period in the Instrumentation Laboratory of the 'Argos' Experimental Nuclear Reactor at ETSIIB. The Professor there was Lluis Callejo Creus, who was fundamental in my familiarization with digital and analog electronics, very modern instrumentation, particle counters, nuclear scalers, Tektronics scopes, etc...

I had repaired and was very familiar with the internal operation of a FACIT ESA-1 mechanical calculator (see below).

Facit ESA01

The FACIT ESA-01 performed FULLY automatic multiplication and division, typing the data as it is done today in electronic calculators:

[2] [3] [4]    [x]    [3] [=] result:  000000000702

[4] [5] [6] [DIV-key] [3] [=] result:  000000000152  (after very few seconds of mechanical noise)

My curiosity was to find a way to electronically emulate it, much faster and silent, doing successive additions (or subtractions) using 3 registers (arrays of digits) with variable shifting between them.

My initial nightmare was the unacceptable number of interconnections needed (4 bits for every digit...!)
The day the challenge really took off, was when I 'discovered' a serialization solution, that solved the DISPLAY, ADDITION/SUBSTRACTION AND SHIFTING, all three AT THE SAME TIME...!

The concept basically is: All decade (4 bit) counters that store the digits in the registers, are CONTINUOSULY FED with 100KHz pulses. The REAL numerical information (user data), is the PHASE difference (of 1 out of 10 possible phases) relative to a master 4 bit decade counter.

A decade that counts like the master, contains a ZERO. When it runs advanced by 3 counts, then it contains a value of 3.
When a decade reaches state '9' its only output wire (decoding the 1001 content) goes 'high' and that SINGLE WIRE is used for his display or his addition/substraction to other digit(s). Below is a block diagram.

Block diagram

The "NIXIE" display tubes were activated in a (new for me, not learned) MATRICIAL method, routinely used in today's numerical LED Displays:
ALL the ZERO-cathodes are connected together, like all ONEs, all TWOs, etc. They are cyclically activated (only 10% of the time). Each NIXIE-Anode is activated only at the 10% phase belonging to the digit to be displayed.

Benefit: much less high voltage transistors and wires!


Jordi Vidal developed the calculator to the "proof of concept" stage, where he showed that a complete calculator could be made using his design. As he further explains:

I implemented only the 4 PCB's for the 4 rightmost digits of the 3 registers, sufficient to verify the successful working of the Display, Data Input, arithmetic, and the speed. The housing and the Display PCB allowed for the full 12 (memory) boards and 12 NIXIEs, but only 6 NIXIEs were soldered in place (I still have the other 6...).

The 'stable' and most numerous part of the design (Memory and Shifting Sequencers) was implemented in dual side PCB's, while most of the 'control logic' circuitry, was 'bread-boarded' underneath the machine. An important effort was made to distribute the final, working circuits, and allocate them in a few more PCB's.

For that purpose, Martin Vergés Trias (an extraordinary teacher and fantastic person) provided a powerful help: He asked me to subdivide the circuitry in small modules, and to supply the interconnection matrix between them. He carefully programmed the IBM1620 of his Computer Laboratory, first in FORTRAN, later in ASSEMBLER, to alternatively minimize (heuristically) the BIGGEST CONNECTOR, AND the number of CONNECTIONS, in a recurrent loop, to provide progressively better results until stabilization. I still keep the original documents and results of the process...

Sequencer & Display PCBs

The Sequencer and Display circuit boards.

Memory board

The Memory circuit board.

The specification was:
Operation times: Add, Substract 2 ms. Multiplication 80 ms.
Clock Speed: 100 KHz

Fully transistorized (except the "NIXIE" display tubes), it used 450 germanium (some silicon) transistors (including 10 COSEM 2N1990 100 Volt types!).

The memory, sequencers, display and part of the logic was implemented on fiberglass dual side PCBs. Part of the operation logic was at bread-boarding stage (under the machine) pending final layout on PCB's.

The Calculator never enter production due to lack of sufficient market demand (in Spain), but was economically feasible, and very price and performance competitive compared to ANITA, FRIDEN, OLYMPIA, and to all mechanical calculators (FACIT ESA-1, the most automatic of all)


By the time the results were ready, and before having time to implement the PCB's, a Barcelona company (TELESINCRO S.A.) asked me to join the development team. They had just started manufacturing and selling a very successful Invoicing Machine, named factor-P, a direct derivative of a Philips ELCOMA Division prototype named 'PRIMA' that used as Main Data Memory 16 register of 16 digits each (in 4 coincident core matrices), and a 'threaded wire' (through 6mm ferrite cores) paged program memory.

The factor-S invoicing machine was more profitable than my calculator (and lots easier to sell).

In a matter of weeks I became the R&D leader, and later Department Head. Factor-P16 (1966) was followed by factor Q32(1968), factor R32 and R64(1969) (last two, with magnetic ledger cards).
A big leap forward was the creation from scratch of the hardware and software of the 'factor S' in 1970, a stored program office computer, with 2 to 8 KByte Core, Very Complex-Instruction set and an innovative (fixed Air-Gap) Magnetic Drum 'mass memory' of 32 KBytes, containing a simpler, but very comprehensive precursor of CP/M and MS-DOS.
Looking deliberately like a small IBM 360, it had 16 Input-Output channels with prioritized cycle steal. Initially with Litton 30 cps printer, inmediatelly added 200 LPM TALLY Printer, mag tape, paper and punched cards, etc.
About 200 of these machines were built and sold in Spain. The last 140 with flying head, 128 KBytes Magnetic DISC. Production ended in 1976, and one is on display in the MNACTEC MUSEUM in Terrassa.


Grateful thanks go to Jordi Vidal Potau for providing the fascinating details and photographs of this machine, from which we can appreciate the ingenuity and effort involved in developing it.

Jordi Vidal's 'Google Gallery' has more photographs and the full-project document, including detailed internal operation logic and schematics, that he eventually wrote up in 1975.

The prototype ULTRAMAT SQR-2000 is in the National Museum of Technology in Catalonia, MNACTEC Museum in Terrassa (Catalonia, Spain).  The website of the museum is

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Text & photographs copyright, except where stated otherwise, © Nigel Tout 2000-2024.